SAVe Lab NUST SEECS

Theorem Proving
HOL (Higher Order Logic) HOL-Light Isabelle PVS Coq ACL2
Model Checking
Spin CV PRISM
Circuit Designing
Basic Circuit Designing
Formal Verification Research Group
Hardware Verification Group (HVG) Concordia University Automated Reasoning Group at Cambridge Model Checking @ CMU Verify at Stanford Formal Methods Library
Conferences and Journals
Upcoming Conference Deadlines (List 1) Formal Method Conferences and Journals Formal Method Conferences Circuits Conferences Conference Ratings Journal Ratings

Links