Faiq Khalid Lodhi, Syed Rafay Hasan, Osman Hasan and Falah Awwad
Globalization trends in integrated circuit (IC) design using deep sub-micron (DSM) technologies are leading to increased vulnerability against malicious intrusions. Various techniques have been proposed to detect such threats during design or testing phases of ICs. However, due to infinitely many possibilities of Trojans, there exists a possibility that some of these intrusions goes undetected. Therefore, runtime Trojan detection techniques are needed to detect the Trojans for complete operation lifetime as a last line of defense. In this thesis, we proposed a generic framework, which leverages the burst mode communication protocol, to detect the intrusions at runtime. Our framework has three phases: 1) behavioral modeling of design specifications using model checkers along with its verification through linear temporal logic (LTL). 2) Counterexamples generated in phase 1 are used to insert run-time monitors at vulnerable paths. 3) Embedded run-time monitors into the system and validate it. Unlike other state-of-the-art techniques, the proposed methodology can be easily used to design the runtime monitoring setup without having netlist information of IP modules. We showed that our approach can detect the AES Trojan benchmarks that utilize any interconnect communication with other modules in the system on chip (SoC).
Faiq Khalid is Post Graduate students of Electrical Engineering at NUST School of Electrical Engineering & Computer Science. He is working on this project in the System Analysis & Verification (SAVE) Lab of NUST-SEECS, under the supervision of Dr. Osman Hasan.